1. Field of the Invention
The present invention relates to a manufacturing method of a crystalline semiconductor film and a manufacturing method of a thin film transistor. Further, the present invention relates to a semiconductor device such as a display device using them.
2. Description of the Related Art
In recent years, a thin film transistor including a semiconductor thin film (with a thickness of several nanometers to several hundreds nanometers, approximately) over a substrate having an insulating surface (e.g., a glass substrate) has been attracting attention. Thin film transistors are widely used for ICs (integrated circuits) and electronic devices such as electro-optical devices. In particular, thin film transistors are rapidly developed as switching elements of image display devices typified by liquid crystal display devices and the like. In an image display device such as a liquid crystal display device, a thin film transistor using an amorphous semiconductor film or a thin film transistor using a polycrystalline semiconductor film is mainly used as a switching element. Further, a thin film transistor using a microcrystalline semiconductor film is known (for example, see Patent Document 1).
It has been known that a deposition method composed of a plurality of levels (a plurality of steps) in which a condition at an earlier stage of deposition and a condition at a later stage of deposition are different is efficient to form a microcrystalline semiconductor film with a favorable crystallinity. This is because at the earlier stage of deposition, a material and crystallinity of a surface over which a crystalline semiconductor is to be formed are likely to have an influence on the crystalline semiconductor film, and at the later stage of deposition, the material and the crystallinity of the crystalline semiconductor film deposited at the earlier stage of deposition are likely to have an influence on the crystalline semiconductor film. The patent document 2 discloses an example of techniques to form a microcrystalline semiconductor film by such a deposition method composed of a plurality of levels (a plurality of steps). In the patent document 2, a deposition rate is improved by increasing a dilution ratio of hydrogen to a source gas (a deposition gas) and electric power for generating plasma at the earlier stage of deposition and by decreasing a dilution ratio of hydrogen to a source gas (a deposition gas) and electric power for generating plasma at the later stage of deposition.
[Reference]
[Patent Document]
    [Patent Document 1] U.S. Pat. No. 4,409,134    [Patent Document 2] Japanese Patent Laid-Open No. 2003-037278